A potential scaling mechanism for a conventional magnetic random access memory (MRAM) cell is spin-torque switching, wherein injected spin polarized electrons interact with the magnetic moment of a free layer in the MRAM cell and transfer their angular momentum (commonly known as spin momentum transfer, or SMT). If sufficient current is applied, the exerted spin-torque switches the free layer either parallel or antiparallel to a pinned layer in the cell depending on the direction of flow of the current. This type of localized current switching is attractive for memory array applications because it does not have the magnetic half-select problems of conventional MRAM cells. Furthermore, spin-torque switching requires less power to operate and the amount of required current decreases as a device scales to smaller sizes. This is possible due to recent advances in high tunneling magnetoresistance (TMR) devices with magnesium oxide (MgO) barriers, including devices with low resistance-area (RA) product, which have yielded low current spin transfer systems capable of achieving sufficient output voltage for read operations.
Generally, spin-torque switching technology has promising advantages over conventional MRAM; however, conventional patterning and integration techniques have not yet perfected methods that address memory volatility issues inherent in current MRAM. Spin-torque switching requires an external field bias (offset) partly due to problems associated with patterning the magnetic tunnel junction (MTJ) and the deposition of the magnetic stack. An imbalance in the pinned layer and the depth of etch have been identified as major contributors to the required external field bias. Another contributor that has been largely ignored is the undesired stray magnetic field contribution from local wires that supply current. Undesired fields can offset the operation-point of an SMT device, hence requiring an external field bias for switching and normal operation.